Muhammad Akmal Chaudhary received the master’s and Ph.D. degrees in electrical and electronic engineering from Cardiff University, Cardiff, U.K., in 2007 and 2011 respectively, and the M.B.A. degree in leadership and corporate governance from the Edinburgh Business School, Heriot-Watt University, Edinburgh, U.K., in 2022. Before joining Ajman University, United Arab Emirates, in 2012, he held a postdoctoral research position with the Centre for High Frequency Engineering, Cardiff University, U.K., where he carried out commercial work for Freescale Semiconductor, Mesuro, TriQuint Semiconductor, National Physical Laboratory (NPL), and GaN Systems. His research interests in nonlinear device characterization, spectrum-efficient power amplifiers, modulated measurement techniques, and microwave electronics have resulted in over 120 academic articles. Dr. Chaudhary is a Chartered Engineer of the Engineering Council, U.K., and a Fellow of the Higher Education Academy, U.K.
The power splitter, also known as power divider, is a microstrip component that typically has one input and two or more outputs. The initial design of Wilkinson power splitter for use in modern circuits faces challenges, such as large dimensions, harmonic generation issues, high overall cost, and limited bandwidth and frequency range. In this paper, artificial neural networks (ANNs) including feed forward neural network (FNN) and recurrent neural networks (RNN) inverted models are presented to design and optimize the performance of the resonators incorporated in the proposed power splitter. Innovative method of ANN inverted models is incorporated to ease the complex resonator design procedures and improve its performance. The designed device is analyzed, simulated, and fabricated, which the measured results have verified the simulation and analyses results. The proposed power splitter also utilizes coupling resonators, meander lines, and open stubs in main structure of the power splitter, achieving a wide bandwidth with fractional bandwidth (FBW) of 49%, effective harmonic suppression (removing second to fifth harmonics with values of 27.6 dB, 33.2 dB, 45.5 dB, 21.4 dB, respectively), and excellent miniaturization (65% smaller compared to the conventional model with dimensions of 0.074 λ g ×0.075 λ g =0.00555 λ g2). Considering the main frequency of 1.4 GHz, the return losses for Port 1, Port 2, isolation, and insertion losses are obtained –17.8 dB, –22 dB, –20.3 dB, and –3.2 dB, respectively. Alongside the acceptable characteristic size, these features make it a promising design.
Rotating Polarization Wave (RPW) is a novel Low Power Wide Area Networks (LPWAN) technology for robust connectivity and extended coverage area as compared to other LPWAN technologies such as LoRa and Sigfox when no error detection and correction is employed. Since, IoT and Machine-to-Machine (M2M) communication demand high reliability, RPW with error correction can significantly enhance the communication reliability for critical IoT and M2M applications. Therefore, this study investigates the performance of RPW with single bit error detection and correction using Hamming codes to avoid substantial overhead. Hamming (7,4) coded RPW shows a remarkable improvement of more than 40% in error performance compared to uncoded RPW thereby making it a suitable candidate for IoT and M2M applications. Error performance of coded RPW outperforms coded Chirp Spread Spectrum (CSS) modulation used in LoRa under multipath conditions by 51%, demonstrating superior adaptability and robustness under dynamic channel conditions. These findings provide valuable insights into the ongoing developments in wireless communication systems whilst reporting Q-RPW model as a new and effective method to address the needs of developing LPWAN and IoT ecosystems.
A new microstrip layout is proposed to design an ultra-compact lowpass-bandpass diplexer. This structure includes a basic bandpass resonator (BPR) in which, a lowpass filter (LPF) is embedded. Accordingly, it occupies an area of 0.008 λg2 that is the smallest compared to earlier reported lowpass-bandpass diplexers mentioned in this work. Moreover, at the lower and upper passbands, it has low insertion losses of 0.006 dB and 0.1 dB respectively. Meanwhile, the return loss at both channels reaches 30 dB. Having low losses makes it suitable for energy harvesting applications. The cut-off frequency of its lowpass channel is located at 0.93 GHz, while the bandpass section resonates at 2.05 GHz. Therefore, it can be used for GSM and 5G applications. Another advantage of this diplexer is its suppressed harmonics from the 1st to the 4th. To design this diplexer, a comprehensive mathematical analysis is performed on the basic structure. Our designed diplexer is fabricated and measured. The simulated scattering parameters and extracted data through direct testing are close to each other with good accuracy.
The Adex neuron model is implemented in a system using the high-matching method under the name Digital-High-Matching Adex Neuron (D-HMAN). Comparing this model to all other comparable efforts, it has reduced implementation costs while accurately reproducing various spiking characteristics, similar to those of biological neurons. High computational performance, minimal hardware cost, and strong resemblance to the original model are all evidenced by experimental findings. In comparison to the original Adex neuron, the suggested D-HMAN version on FPGA uses a lot less hardware and also higher levels of speed and frequency (618.24 vs. 348.71 MHz in Zynq board). With this update, the original model’s temporal patterns of neuron firing and the ever-changing nature of neural activity are replicated by performing computations using affordable fixed-point calculations. For large-scale neuromorphic design aiming for low-cost hardware realization, this makes the suggested model an attractive contender. The suggested model is implemented on the large-scale level in a digital form as a case study.
In this paper, a new microstrip triplexer is designed to work at 2.5 GHz, 4.4 GHz and 6 GHz for mid-band 5G applications. All channels are flat with three low group delays (GDs) of 0.84 ns, 0.75 ns and 0.49 ns, respectively. Compared to the previously reported works, the proposed triplexer has the minimum group delay. The designed triplexer has 18.2%, 13.7%, 23.6% fractional bandwidths (FBW%) at 2.5 GHz, 4.4 GHz and 6 GHz, respectively. The obtained insertion losses (ILs) are low at all channels. These features are obtained without a noticeable increase in the overall size. A novel and simple resonator is used to design the proposed triplexer, which includes two pairs of coupled lines combined with a shunt stub. A perfect mathematical analysis is performed to find the resonator behavior and the layout optimization. The type of shunt stub is determined mathematically. Also, the smallness or largeness of some important physical dimensions is determined using the proposed mathematical analysis. Finally, the designed triplexer is fabricated and measured, where the measurement results verify the simulations.
The C-band is extensively utilized in aviation radars and satellite communications (Satcom). Bandpass filters (BPFs) are crucial components in microwave systems operating within this frequency range. Therefore, it is important to develop a straightforward and effective method for designing BPFs with desired response characteristics. Currently, the prevailing approach for designing wideband microstrip BPFs involves employing multiple microstrip resonators and empirical techniques. However, some of these approaches lack comprehensiveness and a systematic design process. The design steps used for a specific type of microstrip filter with a particular cut-off frequency may not be directly applicable to developing a different filter with a distinct cut-off frequency. Conversely, having a systematic design process and software that can generate filter structures based on the filter order and response characteristics provides significant advantages in designing LC filters. Therefore, if we can design an LC filter with the desired response using conventional methods and subsequently convert it to a microstrip filter, we can achieve a more systematic design approach. The present paper proposes an innovative method to convert LC bandpass filters obtained using classical functions such as Elliptic, Butterworth, Chebyshev, and Bessel functions into microstrip BPFs. The designed microstrip BPFs offer a simple and repeatable design process and possess the flexibility to adjust the working frequency by employing a specific scaling factor. This adaptability makes the designed microstrip BPFs suitable for various applications, including Satcom and 5G systems.
This research presents a novel microstrip configuration for a lowpass-bandpass triplexer. To design this triplexer, first a lowpass filter (LPF) with some empty spaces is designed. Then, two microstrip sections are embedded inside the empty spaces to create bandpass (BP) channels. Therefore, this triplexer occupies a very small size of 0.003 λg2 . A rigorous mathematical analysis and an optimization process are conducted to enhance the triplexer performance. The proposed triplexer features a lowpass (LP) channel cut-off frequency at 870 MHz with bandpass (BP) channels operating at 1.335 GHz and 2.055 GHz. The achieved insertion losses are 0.2 dB, 0.09 dB, and 0.04 dB for all LP and BP channels that are remarkably low, making our triplexer ideal for energy harvesting applications. All bands are flat with suitable group delays (GDs). Meanwhile, the BP channels are wide with 14.1% and 25.5% fractional bandwidths (FBWs) for the middle and upper channels respectively. Our triplexer suppresses the harmonics after the LP channel from the 1st harmonic up to 3rd harmonic. Fabrication and measurement of the proposed triplexer validate our designing method and the simulation results.
This research introduces a new designing process and analysis of an innovative Silicon-on-Insulator Metal-Semiconductor Field-Effect (SOI MESFET) structure that demonstrates improved DC and RF characteristics. The design incorporates several modifications to control and reduce the electric field concentration within the channel. These modifications include relocating the transistor channel to sub-regions near the source and drain, adjusting the position of the gate electrode closer to the source, introducing an aluminum layer beneath the channel, and integrating an oxide layer adjacent to the gate. The results show that the AlOx-MESFET configuration exhibits a remarkable increase of 128% in breakdown voltage and 156% in peak power. Furthermore, due to enhanced conductivity and a significant reduction in gate-drain capacitance, there is a notable improvement of 53% in the cut-off frequency and a 28% increase in the maximum oscillation frequency. Additionally, the current gain experiences a boost of 15%. The improved breakdown voltage and peak power make it suitable for applications requiring robust performance under high voltage and power conditions. The increased maximum oscillation frequency and cut-off frequency make it ideal for high-frequency applications where fast signal processing is crucial. Moreover, the enhanced current gain ensures efficient amplification of signals. The introduced SOI MESFET structure with its modifications offers significant improvements in various performance metrics. It provides high oscillation frequency, better breakdown voltage and good cut-off frequency, and current gain compared to the traditional designs. These enhancements make it a highly desirable choice for applications that demand high-frequency and high-power capabilities.
This work presents a very compact microstrip lowpass-bandpass (LP-BP) triplexer, which is designed and analyzed based on a novel structure. Due to its complex design process, this type of triplexer is rarely designed. Compared to the previous LP-BP triplexers it has the most compact size of 0.006 λ2g , whereas an LP-BP triplexer with dimensions smaller than 0.01 λ2g has not been designed yet. This triplexer is designed based on a perfect mathematical method and optimization simultaneously. Its lowpass band has a cut-off frequency of 0.67 GHz, suitable for low-band 5G applications. The resonance frequencies of its bandpass channels are located at 2.15 GHz and 3.19 GHz. These bandpass channels make the proposed triplexer appropriate for 5G mid-band applications. This triplexer can suppress the harmonics from the first up to 8th harmonic. The bandpass channels are flat and wide with two fractional bandwidths (FBW) of 15% and 11.97%. To prove the designing process and its simulation results, the presented novel LP-BP triplexer is fabricated and experimentally measured. The comparison results show that the experimental measurement confirms the simulation results. The close alignment between the measurements and simulation results demonstrates a high level of accuracy of our designing method.
In this paper, a compact and simple structure of an elliptic microstrip lowpass filter (LPF) is designed for harmonic suppression in microwave quadrature hybrid coupler (QHC) applications. A radial resonator and a rectangular resonator are used to produce an elliptic LPF. The proposed LPF is used on the outer sides of the branch line coupler, which has improved the coupler harmonic suppression. Furthermore, artificial neural networks (ANNs) are incorporated to improve the LPF design process. The LPF best structure is obtained using the proposed ANN model. The proposed LPF has a compact size, which only occupies 16.4 mm × 7.3 mm equals to 0.164 λg × 0.073 λg, has a cut frequency of 2.2 GHz, and shows a sharp transmission band with a roll-off rate of 158.3 dB/GHz. Finally, the deigned QHC operates correctly at 1 GHz, which shows high harmonic suppression ability. The proposed QHC provides wide suppression band from 2.25 GHz up to more than 14 GHz, which can effectively suppress 3rd, to 14th harmonics. The proposed coupler features desirable parameters of S11, S21, S31, and S41, with magnitude of −21 dB, −3.4 dB, −3.3 dB, and −22.5 dB, at the operating frequency. The proposed approach mitigates the complexity of the circuit fabrication, compared with the previous methods while achieved desirable performances for the proposed QHC.
Microstrip couplers play a crucial role in signal processing and transmission in various applications, including RF and wireless communication, radar systems, and satellites. In this work, a novel microstrip 180° coupler is designed, fabricated and measured. The layout configuration of this coupler is completely new and different from the previously reported Rat-race, branch-line and directional couplers. To obtain the proposed coupler, the meandrous coupled lines are used and analyzed mathematically. To improve the performance of our coupler, an optimization method is used. The designed coupler is very compact with an overall size of 0.014λg2. The obtained values of S21 and S31 are -3.45 dB and -3.75 dB, respectively at the operating frequency, while the fractional bandwidth (FBW) is 56.2%. It operates at fo = 1.61 GHz (suitable for 5G applications) and can suppress harmonics up to 2.17fo. Another advantage of this coupler is its low phase imbalance, while the phase difference between S21 and S31 is 180°± 0.023°. Therefore, our device is a balanced coupler with ±0.3 dB magnitude unbalance at its operating frequency. It is important to note that it is very difficult to find a coupler that has all these advantages at the same time. The proposed 180° coupler is fabricated and measured. The comparison shows that the measurement and simulation results are in good agreement. Therefore, the proposed coupler can be easily used in designing high-performance 5G communication systems.
The neuron is sometimes referred to as the “head” or “central” cell of the nervous system since it has the ability to communicate with other neurons or cells via electrical impulses. The hardware realization and simulation of these neurons are critical in neuromorphic engineering. In this paper, we made a device that generates 4 different spiking patterns of the nervous system as a Spike Generator (SG) using a hybrid approximation of the target model called the Piece-Wised Power-2 Based Izhikevich Model (PWP2BIM). This proposed model works in a low-cost state to achieve a correct digital implementation of the Izhikevich model, one of the main neuron models (i.e. decreasing hardware resources and enhancing speed and accuracy). The proposed model successfully reproduces the behavioral traits of the initial neuron model. To verify the results of the mathematical simulation, the proposed model was synthesized and implemented on the Zynq XC7Z010 (3CLG400) reconfigurable board (FPGA). The findings of hardware synthesis and applications of the suggested paradigm demonstrate that certain biological behaviors may be duplicated more effectively and at a significantly lower cost. The suggested model’s frequency can be increased using this technique (implemented on the Zynq board) at least by 3.6 times compared to the original model, and power consumption can be decreased by 28%. High-frequency design of neuronal models with low-cost attributes is required for application-based types of equipment in case of high-speed operations of these components. Thus, using our approach, the desired goals of application-based features are to be fulfilled. In addition, because the suggested model uses fewer hardware resources than the original model, it is feasible to construct a significantly higher number of neurons (approximately 5 times) on a single Zynq board.
In this paper, new LC lumped components and composite lines are used to create a filtering branch line coupler (FBLC) with a small size and wide suppression band. New composite lines are proposed using applied LC lumped components, which are used as the coupler main branches. The proposed FBLC suppresses second to sixth harmonics with high attention level and provides a wide stopband from 1.6 GHz to 5 GHz with more than 20 dB of attention. The presented coupler is analyzed, designed, simulated, and implemented. The measured results show that the proposed FBLC correctly operates at 800 MHz with less than 0.25 dB of insertion loss. In addition, more than 29 dB of return loss and isolation is measured at operating frequency, which shows the correct performance of the proposed design. The size of the proposed FBLC is equal to 23.7 mm × 25.5 mm (0.086λ × 0.093λ), which shows an 87% size reduction. The proposed FBLC with the designed frequency can be used in the communication systems for narrow-band Internet of things (NB-IoT) and traffic control radar applications.
Physically unclonable functions (PUFs) are recently utilized as a promising security solution for authentication and identification of internet of things (IoT) devices. In this article, we present an efficient implementation of XOR Arbiter PUF (XOR APUF) on field-programmable gate arrays (FPGAs). In our work, we incorporated concept of discrete programmable delays logic (PDL) configurations, the obfuscated challenges and temporal majority voting (TMV) before the XOR operation concurrently to enhance uniqueness and security. The derived design has been verified on 25 Xilinx Artix-7 FPGAs and the results are promising with uniqueness of 48.69%, uniformity 50.73% and reliability 99.41%, which significantly improves over previous work into XOR APUF designs. In addition, we also investigate modeling attack resistance of the proposed design against various modelling attacks and the security analysis show that the proposed PUF has lower prediction rate (
This paper presents an implementation of a compact high-gain millimeter-wave dual-band antenna. It is worthwhile noting that the meandering approach was employed to reduce the antenna area by 40%. The designed antenna has a great potential to support the wireless body area networks that are useful in monitoring human health conditions. Particularly, the dual-band property of the antenna aids in catering to the fullduplex data exchange. The geometry of the proposed elliptic patch was analyzed to determine the highest gain which, subsequently, resulted in the achieved gain of 10.2 dBi. Finally, the design validation was obtained through the experimental measurements.
This paper presents a new approach to simplify the design of class-E power amplifier (PA) using hybrid artificial neural-optimization network modeling. The class-E PA is designed for wireless power transfer (WPT) applications to be used in biomedical or internet of things (IoT) devices. Artificial neural network (ANN) models are combined with optimization algorithms to support the design of the class-E PA. In several amplifier circuits, the closed form equations cannot be extracted. Hence, the complicated numerical calculations are needed to find the circuit elements values and then to design the amplifier. Therefore, for the first time, ANN modeling is proposed in this paper to predict the values of the circuit elements without using the complex equations. In comparison with the other similar models, high accuracy has been obtained for the proposed model with mean absolute errors (MAEs) of 0.0110 and 0.0099, for train and test results. Moreover, root mean square errors (RMSEs) of 0.0163 and 0.0124 have been achieved for train and test results for the proposed model. Moreover, the best and the worst-case related errors of 0.001 and 0.168 have been obtained, respectively, for the both design examples at different frequencies, which shows high accuracy of the proposed ANN design method. Finally, a design of class-E PA is presented using the circuit elements values that, first, extracted by the analyses, and second, predicted by ANN. The calculated drain efficiencies for the designed class-E amplifiers have been obtained equal to 95.5% and 91.2% by using analyses data and predicted data by proposed ANN, respectively. The comparison between the real and predicted values shows a good agreement.
A hybrid methodology for developing the wireless power transfer (WPT) system is proposed in this paper. The transmitting (Tx) resonator of the designed WPT with dimensions 40-by-40 sq. mm uses the advantage of the planar coil-based approach. On the other hand, the receiving resonator (Rx) is miniaturized through the defected ground structure-based technique that resulted in the two times size reduction (20-by-20 sq. mm). Furthermore, the optimization of Tx and Rx is performed for the development of the hybrid WPT system. Finally, realized WPT, operating at 300 MHz, demonstrated a power transfer efficiency of 66%.
This article reports the impact of the slow wave effect (SWE) on the design, analysis, and performance of defected ground structure (DGS)-based resonators and the associated wireless power transfer (WPT) systems. As a case study, a systematic analysis of closed-loop polygonal DGS-based resonators is developed which enables a unique methodology to trade off the defect shape and, in turn, SWE and the magnetic field to improve the resonator’s effectiveness. It is conceptualized and then experimentally demonstrated that the performance of DGS-based resonators is shape-independent for closed-loop defects. Subsequently, these resonators were aptly utilized to develop a WPT system prototype. An excellent agreement between the theoretical and measurement results demonstrates the effectiveness of the presented DGS-type WPT concept in this article.
This paper reports the conceptualization, and analysis of a geometrical approach to determine the shift in the in-phase reflection of three conformal meta-surfaces (MS). For the proposed approach, a planar array consisting of MS unit cells (MS-UCs) of a given dimension is drawn on a circle of desired radius (r). The path traveled by the reflected and incident EM wave in terms of an electrical length results in the shift of reflection angle. For the validation purpose, the conformed arrays are simulated under x- and y-polarized EM waves. The sum of the incident and reflected phases resulting in total shift is determined theoretically and compared with the simulated shifts of the three arrays. Furthermore, one of the conformed arrays is experimentally evaluated under the TEM incidence and compared with the theoretical and simulated result. The excellent agreement between the theoretical and measured results demonstrates the effectiveness of the proposed work.
This paper presents a design of a quasi-reflectionless differential phase shifter, which can provide arbitrarily prescribed group delay (GD) and flat phase difference. The proposed quasi-reflectionless differential phase shifter consists of quarter-wavelength coupled lines and series resistor-connected open-circuited half-wavelength stubs in the main and references branches. Closed-form design equations are derived to achieve arbitrary prescribed flat phase difference and GD. For flat phase difference within passband, the GD of the main and reference branches must be the same. In addition, the GD and phase difference flatness in passband are controlled by a series-connected resistor. For experimental validation, a microstrip line 90° quasi-reflectionless differential phase shifter with GD of 1.90 ns at a center frequency of 3.50 GHz is designed and fabricated. The measurement results are well agreed with simulation and theoretical predicted results.
This paper explores the use of Decision Tree algorithm in the development of small signal model of GaN HEMT. In this stage, each measured s-parameters are modelled separately exploiting the bias, frequency and geometry dependence of the device as input predictors. This necessitates the tuning of parameters using Bayesian optimization and Random search algorithms. The outcome in terms of MSE and MAE demonstrates that the Random search algorithm gives a superior agreement with the measured values for the entire frequency range. Subsequently, the developed model is incorporated in the commercial CAD environment and a class-F power amplifier is designed to highlight the seamless integration ability and effectiveness of the developed model.
This paper thoroughly analyzes six different architectures of Artificial Neural Network (ANN) used in the development of small-signal model of Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs). At the outset, multilayer perceptron, cascade-forward, nonlinear autoregressive with exogenous inputs (NARX) in series-parallel and parallel configurations, distributed layer network, and layer recurrent architectures are used to develop GaN HEMT models for simulating the behavior of the device. Subsequently, comparison of the proposed architecture is carried out in terms of ease of implementation, simulation time, computational efficiency, fitting curves, mean squared error, mean absolute error, and coefficient of determination at distinct bias conditions. It is identified that the NARX series-parallel architecture based model is the most effective small-signal model among all the other ANN based models. It is computationally efficient, simple to implement, and possess the best generalization capability. It is also observed that the multilayer perceptron and cascade-forward exhibit analogous performance but the latter has a little edge. The NARX-parallel and feedback delay exhibit similar performance whereas the layer recurrent architecture is found to be the least suitable for the modelling of GaN HEMTs.
This paper presents the development of a highly efficient defected ground structure-based near-field wireless power transfer (WPT) system. The required resonators possess a 30-by-30 sq. mm area and have meander line slots etched on the ground side. The length of the meander line was aptly varied to generate a greater magnetic field around transmitting and receiving resonators. Subsequently, this aided in enhancing the overall WPT performance. Particularly, the realized WPT system, working at 25 mm, demonstrated the power transfer efficiency equal to 81% at 300 MHz.